BRT Community
General Category => Discussion - EVE => Topic started by: raydem on November 15, 2021, 10:31:33 PM
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Hello,
I have a FT811 and I am triying to Read the REG_ID, but only get 0xBE. My code is:
EVE_pdn_clear();
DELAY_MS(21); /* minimum time to allow from rising PD_N to first access is 20ms */
EVE_cmdWrite(EVE_CLKEXT,0); /* setup EVE for external clock */
EVE_cmdWrite(EVE_CLKSEL,0x46); /* set clock to 72 MHz */
EVE_cmdWrite(EVE_ACTIVE,0); /* start EVE */
DELAY_MS(500);
chipid = EVE_memRead8(REG_ID);
And the SPI signals are:
CLKEXT and CLKSEL commands.
(https://i.ibb.co/RSH7pXP/1.png)
Active command.
(https://i.ibb.co/yWGBCWv/2.png)
Read REG_ID.
(https://i.ibb.co/tQJp1x6/3.png)
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Hello,
The FT81x can only run at 60MHz and so you could try removing the line below to see if it helps.
EVE_cmdWrite(EVE_CLKSEL,0x46); /* set clock to 72 MHz */
Also, ensure the board that you use has the external crystal fitted.
Best Regards, BRT Community
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Thank you very much, Now appear that works.
I am trying to config the Display. Could you help me, please? The display is COM24H2P71ULC of 320x240. This is the data of datasheet:
(https://i.ibb.co/ctdmzWf/display.png)
The config that I suppose is:
#define EVE_HSIZE (240L) /* Thd Length of visible part of line (in PCLKs) - display width */
#define EVE_VSIZE (320L) /* Tvd Number of visible lines (in lines) - display height */
#define EVE_VSYNC0 (0L) /* Tvf Vertical Front Porch */
#define EVE_VSYNC1 (2L) /* Tvf + Tvp Vertical Front Porch plus Vsync Pulse width */
#define EVE_VOFFSET (10L) /* Tvf + Tvp + Tvb Number of non-visible lines (in lines) */ //DELETE
#define EVE_VCYCLE (340L) /* Tv Total number of lines (visible and non-visible) (in lines) */
#define EVE_HSYNC0 (0L) /* (40L) // Thf Horizontal Front Porch */
#define EVE_HSYNC1 (20L) /* Thf + Thp Horizontal Front Porch plus Hsync Pulse width */
#define EVE_HOFFSET (40L) /* Thf + Thp + Thb Length of non-visible part of line (in PCLK cycles) */
#define EVE_HCYCLE (296L) /* Th Total length of line (visible and non-visible) (in PCLKs) */
#define EVE_PCLK (10L) // 60/10 = 6 MHz
#define EVE_PCLKPOL (1L) // negative active clock edge
#define EVE_SWIZZLE (0L) // order of bits in each colour channel to be reserved.
#define EVE_CSPREAD (1L) // helps reduce the switching noise
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I just went over the datasheet and I would try this:
#define EVE_HSIZE (240L)
#define EVE_VSIZE (320L)
#define EVE_VSYNC0 (10L)
#define EVE_VSYNC1 (12L)
#define EVE_VOFFSET (22L)
#define EVE_VCYCLE (340L)
#define EVE_HSYNC0 (16L)
#define EVE_HSYNC1 (36L)
#define EVE_HOFFSET (76L)
#define EVE_HCYCLE (296L)
#define EVE_PCLK (10L)
#define EVE_PCLKPOL (0L)
#define EVE_SWIZZLE (0L)
#define EVE_CSPREAD (1L)
This display is however not like any other I have used so far.
And while I noticed that you have used my library, it looks like you have rewritten it starting partly from scratch.
Nothing wrong with this.
But is there anything that I could improve upon?
Which controller are you using?
The SPI timing is rather strange with so much time before CS goes high again.
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I just went over the datasheet and I would try this:
#define EVE_HSIZE (240L)
#define EVE_VSIZE (320L)
#define EVE_VSYNC0 (10L)
#define EVE_VSYNC1 (12L)
#define EVE_VOFFSET (22L)
#define EVE_VCYCLE (340L)
#define EVE_HSYNC0 (16L)
#define EVE_HSYNC1 (36L)
#define EVE_HOFFSET (76L)
#define EVE_HCYCLE (296L)
#define EVE_PCLK (10L)
#define EVE_PCLKPOL (0L)
#define EVE_SWIZZLE (0L)
#define EVE_CSPREAD (1L)
This display is however not like any other I have used so far.
And while I noticed that you have used my library, it looks like you have rewritten it starting partly from scratch.
Nothing wrong with this.
But is there anything that I could improve upon?
Which controller are you using?
The SPI timing is rather strange with so much time before CS goes high again.
Thanks for the answer. Finally, I achieved it. This is the configuration.
#define EVE_HSIZE (240L)
#define EVE_VSIZE (320L)
#define EVE_VSYNC0 (10L)
#define EVE_VSYNC1 (12L)
#define EVE_VOFFSET (22L)
#define EVE_VCYCLE (342L)
#define EVE_HSYNC0 (16L)
#define EVE_HSYNC1 (36L)
#define EVE_HOFFSET (76L)
#define EVE_HCYCLE (316L)
#define EVE_PCLK (10L)
#define EVE_PCLKPOL (1L)
#define EVE_SWIZZLE (0L)
#define EVE_CSPREAD (0L)
I have not problem with your code and it is good, but I had to adapt it for my code . About the time before CS high, yes, It is because I am using a OS (Not RTOS, It our own OS). I But I think that I not have problem with this. Now, I draw in the LCD well, but I have a stranger problem. First, I need to use the SPI communication few as possible, so I put all in a buffer and send it once. (of course that some commands will be separatly). But, for example in the next code. I buffered a list and send it, the first time that execute StaticBackground the display shows the rigth draw but when change the color and draw again.... Nothing happens.
Private void W32(uint8 *start, const uint32 data){
uint8 cont = *start;
gpDataBuffer[++cont] = (uint8)(data & 0x000000ff);
gpDataBuffer[++cont] = (uint8)(data >> 8);
gpDataBuffer[++cont] = (uint8)(data >> 16);
gpDataBuffer[++cont] = (uint8)(data >> 24);
*start = cont;
}
Private void StaticBackground(uint16 *start){
uint8 cont = *start;
uint32 address = EVE_RAM_DL; // 0x00300000;
gpDataBuffer[cont] = (uint8)((address >> 16) | MEM_WRITE);
gpDataBuffer[++cont] = (uint8)(address >> 8);
gpDataBuffer[++cont] = (uint8)(address & 0x000000ff);
if(change == 0u){
W32(&cont, CLEAR_COLOR_RGB(0,255,255));
W32(&cont, COLOR_RGB(255,0,0));
}
else{
W32(&cont, CLEAR_COLOR_RGB(255,255,0));
W32(&cont, COLOR_RGB(0,255,0));
}
W32(&cont, CLEAR(1,1,1));
W32(&cont, BEGIN(EVE_POINTS));
W32(&cont, POINT_SIZE(200));
W32(&cont, VERTEX2II(120,120,0,0));
W32(&cont, END());
W32(&cont, DISPLAY());
SendGraphicData(++cont); //Send over SPI the buffer
}
void Main(){
uint8 change = 0u;
Init_EVE();
while(1){
StaticBackground(0);
EveMemWrite(SEND_8_BITS, REG_DLSWAP, EVE_DLSWAP_FRAME); //Send over SPI DLSWAP
if (0u == change)
change = 1u;
else
change = 0u;
DELAY_MS(5000);
}
}