With some further testing I can check off a few questions:
*The offset of REG_SPI_WIDTH is 0x188 (the programming manual (v2.1) incorrectly states it is 0x180)
*You can write to the register using just 8 bits despite the manual indicating it's a 32 bit register
*This does appear to take effect once CS is released
So I really only have one outstanding question which is whether or not the SPI mode can be switched from normal to dual/quad at any time or if there is only a certain window during which this can take place.
*The offset of REG_SPI_WIDTH is 0x188 (the programming manual (v2.1) incorrectly states it is 0x180)
*You can write to the register using just 8 bits despite the manual indicating it's a 32 bit register
*This does appear to take effect once CS is released
So I really only have one outstanding question which is whether or not the SPI mode can be switched from normal to dual/quad at any time or if there is only a certain window during which this can take place.