Hi,

Yes, the Append is very useful in reducing SPI traffic when you have many parts of the screen which don't change.

The display list in RAM_DL always defines the final display and is also double buffered.

As you mentioned Rudolph, you can append together several building blocks to make up the screen by creating the display list, storing it whilst noting the location and size, and then appending it in. Note that the total size must still fit in the 8K available.

We have some additional examples and documents below which may be useful:

Principles of using Append
https://brtchip.com/wp-content/uploads/Support/Documentation/Application_Notes/ICs/EVE/AN_340_FT800_Optimising-screen-updates-with-Macro-and-Append.pdf

Example of putting together several static sections
https://brtchip.com/wp-content/uploads/Support/Documentation/Application_Notes/Modules/EVE/AN_356-FT800-Interfacing-I2C-Sensor-to-VM800P.pdf

Simple example of append - see section 9
https://brtchip.com/wp-content/uploads/Support/Documentation/Application_Notes/ICs/EVE/BRT_AN_014_FT81X_Simple_PIC_Library_Examples.pdf

Some of our sample apps also use this technique
https://brtchip.com/softwareexamples-eve/


Best Regards,
BRT Community

Hello,

Is the font compressed or non-compressed?

If its non compressed you can check the size of the data array for the font that's been written to RAM_G.

Best Regards,
BRT Community

Hello,

We have successfully tested the following library with the BT815 IC in the office here:
https://brtchip.com/wp-content/uploads/Support/Documentation/Application_Notes/ICs/EVE/BRT_AN_014_FT81X_Simple_PIC_Library_Examples.pdf

Now it doesn't include the definitions or implementations of BT81X specific functions, but it should allow you to get up and running as the SPI and legacy FT81x functions remains the same for the BT81x. The code included is based on a PIC microcontroller, but it shouldn't be too hard to port to your given MCU (you basically just need to do the SPI implementation for your MCU).

If you wish a schematic review please email in to us at:
support.emea@brtchip.com

Best Regards,
BRT Community

Hello,

1.     You can Program the blob into flash using our EVE Asset Builder utility (please see the attached image).
        https://brtchip.com/eve-toolchains/#EVEAssetBuilder

2.   After the blob is programed,  run the program as below to check the state of Flash:

uint32_t Gpu_CoCmd_FlashHelper_SwitchFullMode(Gpu_Hal_Context_t *phost)
{
       uint8_t val;
       /* Try detaching and attaching the flash followed by fast mdoe */
       Gpu_CoCmd_FlashDetach(phost);
       App_Flush_Co_Buffer(phost);
       Gpu_Hal_WaitCmdfifo_empty(phost);
       val = Gpu_Hal_Rd8(phost, REG_FLASH_STATUS);

       if (FLASH_STATUS_DETACHED != val)
       {
              printf("Error, Flash is not able to detatch %d\n", val);
              return 0;
       }

       Gpu_CoCmd_FlashAttach(phost);
       App_Flush_Co_Buffer(phost);
       Gpu_Hal_WaitCmdfifo_empty(phost);
       val = Gpu_Hal_Rd8(phost, REG_FLASH_STATUS);

       if (FLASH_STATUS_BASIC != val)
       {
              printf("Error, Flash is not able to attach %d\n", val);
              return 0;
       }

       Gpu_CoCmd_FlashFast(phost, 0);
       App_Flush_Co_Buffer(phost);
       Gpu_Hal_WaitCmdfifo_empty(phost);
       val = Gpu_Hal_Rd8(phost, REG_FLASH_STATUS);

       if (FLASH_STATUS_FULL != val)
       {
              printf("Error, Flash is not able to get into full mode %d\n", val);
              return 0;
       }
       return 1;
}

Best Regards,
BRT Community

Hello,

You would need to clarify with Matrix Orbital if these connections are correct.

HI,
The same code I have applied.
As I am using Matrix orbital EVE2-70A TPR module
I did the following wiring
1) pin no.1 3.3v, pin no.16 3.3v, pin no.17,18 all are shorted to 3.3 v from mcu board.
2) Pin no.2 GND, Pin no. 15 GND, Pin no. 19,20 all are shorted to GND from mcu board
3) int pin is shorted to GND of mcu board through 4.7 kohm.
is this connection is correct?

Best Regards,
BRT Community

Hello,

No, if you read the datasheet for the FT81X you will see that the max PCLK available is 30MHz (hence using this number in the above calculations).

The term HD in this context refers to the screen resolution, not necessarily the screens frame rate (which the document does not reference). It is possible to run EVE at these higher resolutions, though this will incur a performance penalty in terms of frame rate. EVE is designed primarily to be an HMI, and is optimized to give a good visual experience for such use cases, it is not designed to be for example to be a high frame rate video player, although it can be used to display video. I would suggest the differences between 60 and 53 fps in this scenario is negligible.

Best Regards,
BRT Community

Hello,

The use of an LVDS adapter turns out isn't relevant to your question, it just happened that the demo used an LCD panel with an LVDS interface and not an RGB interface.

The EVE series of ICs do not include a frame buffer, they dynamically clock out each computed pixel on the screen. A displays size and what the Pixel Clock is running at will determine the achievable performance. It is possible to run the BT81x at higher resolutions, but this will result in a slower refresh rate for the screen.

If we take a working example from the following WQVGA settings:
  // WQVGA display parameters
   lcdWidth   = 800;                                                            // Active width of LCD display
   lcdHeight  = 480;                                                            // Active height of LCD display
   lcdHcycle  = 928;                                                            // Total number of clocks per line
   lcdHoffset = 88;                                                             // Start of active line
   lcdHsync0  = 0;                                                               // Start of horizontal sync pulse
   lcdHsync1  = 48;                                                            // End of horizontal sync pulse
   lcdVcycle  = 525;                                                           // Total number of lines per screen
   lcdVoffset = 32;                                                            // Start of active screen
   lcdVsync0  = 0;                                                              // Start of vertical sync pulse
   lcdVsync1  = 3;                                                              // End of vertical sync pulse
   lcdPclk    = 2;                                                                  // Pixel Clock
   lcdSwizzle = 0;                                                              // Define RGB output pins
   lcdPclkpol = 1;                                                              // Define active edge of PCLK                 

HCYCLE = 928
VCYCLE = 525
VCYCLE * HCYCLE  = 487,200

Note: REG_PCLK is using the value 2 which will divide the clock down to 30Mhz (assuming system clock of 60Mhz).

Result = 30,000,000/487,200 = ~ 61 fps


Best Regards,
BRT Community

Hello,

Sorry, what is your question? Are you looking for the HD Demo source or?

Best Regards,
BRT Community