Topic: FT801: strange behaviour when the FIFO wraps the end (Read 9043 times)

marcolando · « **on:** March 15, 2021, 09:29:28 PM »

Hello everybody,
I'm using a FT801 to drive a TFT display for show a menu interface; I send the display list through the Co-processor's FIFO.
Here is my problem: since the FT801 start and has been configured, the mcu sends a single display list, composed of 6 data bursts, for a total of 262byte (3bytes for the FIFO writing address at each burst + a total of 244bytes of payload/commands).
Bursts are repeated when the interface needs to change some parameters, button colors for example.
The FIFO memory address pointer starts from 0x0000 and, after the first complete data set the pointer is 0x00F4, then 0x01E8 after the second one and so on until the FIFO reaches the end and wraps newly from the beginning: .... 0x0F40 -> 0x0034 -> ...
Everything works fine until the FIFO wraps 0x0000 the 4th time (... 0x0FDC -> 0x00D0) at wich the display starts showing the FTDI logo!
Have you got any idea on this "strange" beahaviour of the FT801? What kind of test you suggest should I do in order to find the problem in my code?

Thank you very much in advance for the support,
Regards.

Marco.

BRT Community · « **Reply #1 on:** March 16, 2021, 03:40:00 PM »

Hi Marco,

Could you advise how you handle your MCU counter which you use to write REG_CMD_WRITE after the burst?

Ensure that you have the rollover taken account of when tracking the offset value. EVE will roll over the internal counter at 4095 provided that you are in the middle of a burst. But if you use several bursts to create a single list in sections, you should re-calculate the offset after sending each one. Also, make sure you update the REG_CMD_WRITE before you add 4096-4 bytes of commands (if you update it after your 6 bursts of 244 bytes this should be fine though)

If your display list changes each time, it is also worth checking that your text strings are padded to multiple of 4 and that all commands begin at a 4-byte aligned address within the burst.

If the write pointer is written to a value which is lower than the read pointer, the FIFO will execute all the way round back to the value of REG_CMD_WRITE as it always goes upwards and round, which can cause it to execute unintended commands.

Best Regards, BRT Community

Rudolph · « **Reply #2 on:** March 16, 2021, 05:50:57 PM »

The V4 version of my library worked with FT80x:
https://github.com/RudolphRiedel/FT800-FT813/tree/4.x

Maybe this helps tracking the issue in your code.
Check the variable cmdOffset in EVE_commands.c.

marcolando · « **Reply #3 on:** March 17, 2021, 07:42:19 AM »

Hi, thank you for the reply.
I think I found the issue: I was taking account of the FIFO roll over only when I was updating REG_CMD_WRITE at the end of the display list, but not when I was sending the memory address at the beginning of each data bursts.
After doing the correction now it seems to work perfectly.
Thank you for the support, going deep in your suggest to report the FIFO counter handling let me understood the problem!

Regards,
Marco.

BRT Community · « **Reply #4 on:** March 19, 2021, 03:17:15 PM »

Hi Marco,

Great to hear that you solved the issue,

Best Regards, BRT Community

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Author Topic: FT801: strange behaviour when the FIFO wraps the end (Read 9043 times)

marcolando

FT801: strange behaviour when the FIFO wraps the end

BRT Community

Re: FT801: strange behaviour when the FIFO wraps the end

Rudolph

Re: FT801: strange behaviour when the FIFO wraps the end

marcolando

Re: FT801: strange behaviour when the FIFO wraps the end

BRT Community

Re: FT801: strange behaviour when the FIFO wraps the end