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[Holger]

I'm trying to create astc compressed images for use with the BT815 encoding them with the ARM ASTC encoder (https://github.com/ARM-software/astc-encoder).
The resulting astc files can be loaded by the BT815 but blocks are scrambled and the image has a wrong color.
Assets created with the Bridgetek Asset Builder work fine obviously, so question is in what respect the Asset Builder encodes differently from the ASTC reference implementation by ARM?

Settings used to encode images with the ARM encoder are:
- LDR RGBA
- Blocksite 8x8
- Thorough compression
- no other options of the ARM astc encoder enabled

I noticed that the ARM encoder adds an ASTC header as first 16 bytes of the resulting image, while the Bridgetek Asset Builder leaves out the header completely.  This is not the problem though as the result on BT815 is the same no matter if the header is included or not.

Has anybody ever tried to use ASTC images encoded with the ARM encoder on a BT815 and succeeded? If so, which settings worked for you?

[Holger]

By now I figured out that Bridge Asset Builder img_cvt.exe actually calls the ARM Encoder internally when converting to ASTC.
The exact parameters for that call are:
astcenc.exe -c <tmp file in> <tmp file out> 8x8 -thorough -silentmode 

Converting an image with the exact same parameters does with astcencoder.exe alone does not result in the same result the BridgeTek Converter gives, however. So some additional  processing must be done by img_cvt.exe.

It surely leaves out the header. I also suspect it might move blocks around to accomodate for a different x/y coordinate origin.
Any help on what img_cvt.exe additionally does is welcome.

[BRT Community]

Hello,

In short, our EAB tool is using the ARM ASTC encoder to convert the PNG into ASTC blocks.  However, our EVE decoder assumes certain policy of ASTC block layout, it is called tile in 2x2.   Mentioned in the Programmers guide.

When there is an odd number of blocks on a line, the final two blocks are packed into a 1x2. When
there is an odd number of rows, then the final row of blocks is linear.
The diagram in section 6.1 of the programmers guide shows the same piece of memory loaded with ASTC blocks drawn with ascending memory addresses. The first column shows the addresses used by cell 0, the second column cell 1.

Best Regards,
BRT Community