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Unwanted stripes on the EVE4 1024x600 picture

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I have problem with this EVE4 7" display, old EVE3 7" 800x480 worked fine.
In attachment file is a photo from my display.
My code base is the same only few lines added to initialize.

    #ifdef EVE4
       EVE_MemWrite16(REG_PCLK_FREQ,           PCLK_FREQ);

I got the timing parameters from Riverdi.
#ifdef EVE4
    #define DWIDTH     1024
    #define DHEIGHT    600
    #define PIXVOFFSET   0
    #define PIXHOFFSET   0
    #define HCYCLE     1344
    #define HOFFSET     160
    #define HSYNC0       0
    #define HSYNC1      70
    #define VCYCLE     635
    #define VOFFSET     23
    #define VSYNC0       0
    #define VSYNC1      10
    #define PCLK         1
    #define SWIZZLE      0
    #define PCLK_POL     1
    #define HSIZE      1024
    #define VSIZE      600
    #define CSPREAD      0
    #define DITHER       0
    #define PCLK_FREQ    0xd12 //0xe12
    #define PCLK_2X      0
    #define AH_HCYCLE_MAX 0
    #define DISPWIDTH_HSF      1076

Only PCLK_FREQ I changed to 0xd12 , riverdi value was 0xe12.
0xe12 makes stripes even more.

What I'm doing wrong? What is purpose of DISPWIDTH_HSF ?

To verify that the initialization of the screen is correct, in EVE 4 we have the possibility of loading a test screen through the CMD_TESTCARD () register.

According to BRT_AN_033_BT81X_Series_Programming_Guide, page 189:

Features of the testcard are:
• white border at the extents to confirm screen edges and clock stability
• red, green, blue and white gradients to confirm color bit depth
• horizontal and vertical checker patterns to confirm signal integrity
• circle graphics to confirm aspect ratio
• radial line pattern to confirm antialias performance

Would you be willing to share the rest of your code? I'd like to try it on the Eve4 display that I have and see how it works. I'm having issues myself coming from a Eve3 to an Eve4.  Thanks!


The display parameters are looking ok.
Well, except for this: "#define PCLK_FREQ    0xd12 //0xe12" which I can not check on the fly.
Ok, table 4-11 in the datasheet has D12 as value for 51MHz which is probably right.

My library has it defined like this:
/* RVT70HSBxxxxx 1024x600 7.0" Riverdi, various options, BT817 */
#if defined (EVE_RVT70H)
#define EVE_HSIZE   (1024L)
#define EVE_VSIZE   (600L)

#define EVE_VSYNC0   (0L)
#define EVE_VSYNC1   (10L)
#define EVE_VOFFSET   (23L)
#define EVE_VCYCLE   (635L)
#define EVE_HSYNC0   (0L)
#define EVE_HSYNC1   (70L)
#define EVE_HOFFSET (160L)
#define EVE_HCYCLE    (1344L)
#define EVE_PCLK   (1L) /* 1 = use second PLL for pixel-clock in BT817 / BT818 */
#define EVE_PCLK_FREQ (51000000L) /* EVE_PCLK needs to be set to 1 for this to take effect */
#define EVE_PCLKPOL (1L)
#define EVE_SWIZZLE (0L)
#define EVE_CSPREAD   (0L)
#define EVE_TOUCH_RZTHRESH (1200L)
#define EVE_GEN 4

And the reason why I am using "#define EVE_PCLK_FREQ (51000000L)" is that the BT817/BT817 actually have a command to configure the second PLL with: CMD_PCLKFREQ
The description for REG_PCLK_FREQ on the other hand is rather difficult to understand in comparision.

Since I already have a RVT101HVBNWC00-B up and running and had to design a new PCB for it, I know that these are bit tricky in terms of power consumption.
How do you connect the display to your micro and more importantly, how do you supply both the logic and the backlight rails?

BRT Community:

Thank you for you inquiry, could you please advise where the image is being stored (flash or ram)?

Also could you send the code you are using to display it and the image you are trying to display?

Best regards

BRT Community


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