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Hi,
Where do you enable back light of the LCD? May be LCD is working but because of back light is off you can not see the screen.

Hi,
FT810Q EVE is used.
Datasheet of the LCD (G084SN05 V9) says that 30MHz is a minimum working clock. Reducing the PLCK cause to completely non working LCD. But if i reduce pixel clock to 30MHz (lcdPclk=2)  - EVE computations will be reduced too according to the new lower clock? And will not be more time on computations. Or system clock (EVE) stays 60MHz and only pixel clock is changed and system clock is not same as pixel clock and Pclk divider applies only for pixel clock? If yes, i can increase system clock and reduce more pixel clock with lcdPclk.
All screens are not ready yet and i do not know if problem will back. Because of that i would like to know optimal characteristics for 800x600 LCD with 30MHz pixel clock. All EVE examples are for displays up to 800x480 and no one for 800x600. For example, documentation says that VOFFSET hold the length of the non-visible parts and must be smaller than VCYCLE -VSIZE, but how many smaller? At the other side, I understand that all timings are specific for each LCD and not common one.
Thank you

Thank you for explanation.
It not solved the issue. At first tests all was according to datasheet and it did not work correctly on some screens. After i have started to play with values and found that increasing non-visible parts  makes outputs better but not at all screens. For example, if screen is not 'heavy' and have medium number of elements all work correctly. If screen have many elements (like keyboard panel with many buttons) - it starts to make problems. But increasing non-visible parts of the screen reduces FPS: frequency/(w*h).
I will try to change frequency, configuring timings is looks something magic
Next parameters looks good, but need make tests with more complex screens:
Clock is reduced to 30MHz

        FT_DispWidth = 800;
FT_DispHeight = 600;
FT_DispHCycle =  980;
FT_DispVCycle = 628;
FT_DispHSync0 = 0;
FT_DispVSync0 = 0;
FT_DispHOffset = 130;
FT_DispVOffset = 17;
FT_DispVSync1 = 15;
FT_DispHSync1 = 200;

But it is not exactly according to datasheet and i am afraid that problem is still not solved. It is strange that does not matter which values at VSync1 and HSync1, it is not affects on result. For example, VSync1=HSync1=2 looks same.

Hi All,
I can not find correct display parameters for SVGA display (G084SN05V9).
The some screens on display has flickers and screen looks damaged.

FT_DispWidth = 800;
FT_DispHeight = 600;
FT_DispHCycle =  928;
FT_DispHOffset = 88;
FT_DispHSync0 = 0;
FT_DispHSync1 = 48;
FT_DispVCycle = 645;
FT_DispVOffset = 40;
FT_DispVSync0 = 0;
FT_DispVSync1 = 2;

Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_HCYCLE, FT_DispHCycle);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_HOFFSET, FT_DispHOffset);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_HSYNC0, FT_DispHSync0);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_HSYNC1, FT_DispHSync1);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_VCYCLE, FT_DispVCycle);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_VOFFSET, FT_DispVOffset);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_VSYNC0, FT_DispVSync0);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_VSYNC1, FT_DispVSync1);
Ft_Gpu_Hal_Wr8 (phost, (ft_uint32_t)REG_SWIZZLE, FT_DispSwizzle);
Ft_Gpu_Hal_Wr8 (phost, (ft_uint32_t)REG_PCLK_POL, FT_DispPCLKPol);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_HSIZE, FT_DispWidth);
Ft_Gpu_Hal_Wr16(phost, (ft_uint32_t)REG_VSIZE, FT_DispHeight);

Increasing Number of non-visible lines(FT_DispHOffset ,FT_DispVOffset) and total number of lines (FT_DispHCycle ,FT_DispVCycle ) can solve the problem on some of the screens but other screens still have flickers.
Where can i find optimal  parameters for display with that resolution?

Thank you